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Bibliography

Major publications by the team in recent years
  • 1M. Breughe, Z. Li, Y. Chen, S. Eyerman, O. Temam, C. Wu, L. Eeckhout.

    How Sensitive is Processor Customization to the Workload’s Input Datasets?, in: IEEE, International Symposium on Application Specific Processors (SASP), in conjunction with, San Diego, CA, June 2011.
  • 2O. Certner, Z. Li, A. Raman, O. Temam.

    A Very Fast Simulator for Exploring the Many-Core Future, in: IEEE, International Parallel & Distributed Processing Symposium (IPDPS), in conjunction with, Anchorage, Alaska, May 2011.
  • 3T. Chen, Y. Chen, Q. Guo, O. Temam, Y. Wu, W. Hu.

    Statistical Performance Comparisons of Computers, in: IEEE, International Symposium on High-Performance Computer Architecture (HPCA), in conjunction with, New Orleans, Louisiana, February 2012.
  • 4Y. Chen, S. Fang, L. Eeckhout, O. Temam, C. Wu.

    Iterative Optimization for the Data Center, in: ACM/IEEE, International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), in conjunction with, London, UK, March 2012.
  • 5H. Esmaeilzadeh, S. Girbal, K. McKinley, O. Temam, S. Yehia.

    Programming Heterogeneous Hardware Components with Software Components, in: Workshop on SoC Architecture, Accelerators and Workloads (SAW), in conjunction with International Symposium on High-Performance Computer Architecture (HPCA), San Antonio, Texas, February 2011.
  • 6A. Hashmi, H. Berry, O. Temam, M. Lipasti.

    Automatic Abstraction and Fault Tolerance in Cortical Microarchitectures, in: ACM/IEEE, International Symposium on Computer Architecture (ISCA), in conjunction with, San Jose, CA, June 2011.
  • 7R. Heliot, A. Joubert, O. Temam.

    Robust and Low-Power Accelerators based on Spiking Neurons for Signal Processing Applications, in: International Workshop on Design for Reliability (DFR), in conjunction with International Conference on High Performance Embedded Architectures and Compilers (HiPEAC), Heraklion, Greece, January 2011.
  • 8T. Khan, D. Gracia-Perez, O. Temam.

    Combining On-Line Sampling and Adaptive Warm-Up for a More Practical Sampling Strategy, in: International Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), in conjunction with International Conference on High Performance Embedded Architectures and Compilers (HiPEAC), Heraklion, Greece, January 2011.
  • 9O. Temam, R. Heliot.

    Implementation of Signal Processing Tasks on Neuromorphic Hardware, in: IEEE, International Joint Conference on Neural Networks (IJCNN), in conjunction with, San Jose, CA, June 2011.
References in notes
  • 10S. Y. Borkar, P. Dubey, K. C. Kahn, D. J. Kuck, H. Mulder, E. R. M. Ramanathan, V. Thomas, I. Corporation, S. S. Pawlowski.

    Intel ® Processor and Platform Evolution for the Next Decade Executive Summary, 2006.
  • 11L. N. Chakrapani, B. E. S. Akgul, S. Cheemalavagu, P. Korkmaz, K. V. Palem, B. Seshasayee.

    Ultra-efficient (embedded) SOC architectures based on probabilistic CMOS (PCMOS) technology, in: Design, Automation, and Test in Europe, Munich, 2006, 1110 p.
  • 12S. Cheemalavagu, P. Korkmaz, K. V. Palem.

    Ultra low-energy computing via probabilistic algorithms and devices: CMOS device primitives and the energy-probability relationship, in: International Conference on Solid State Devices, Tokyo, 2004, p. 2–4.
  • 13L. Chua.

    Memristor-The missing circuit element, in: IEEE Transactions on Circuit Theory, 1971, vol. 18, no 5, p. 507–519. [ DOI : 10.1109/TCT.1971.1083337 ]
  • 14P. Fromherz, A. Stett.

    Silicon-Neuron Junction: Capacitive Stimulation of an Individual Neuron on a Silicon Chip, in: Physical Review Letters, August 1995, vol. 75, no 8, p. 1670–1673. [ DOI : 10.1103/PhysRevLett.75.1670 ]
  • 15H. Larochelle, D. Erhan, A. Courville, J. Bergstra, Y. Bengio.

    An empirical evaluation of deep architectures on problems with many factors of variation, in: International Conference on Machine Learning, New York, New York, USA, ACM Press, 2007, p. 473–480. [ DOI : 10.1145/1273496.1273556 ]
  • 16B. Liang, P. Dubey.

    Recognition, Mining and Synthesis, in: Intel Technology Journal, 2005, vol. 09, no 02. [ DOI : 10.1535/itj.0902.f ]
  • 17M. Muller.

    Dark Silicon and the Internet, in: EE Times "Designing with ARM" virtual conference, 2010.
  • 18T. Serre, L. Wolf, S. Bileschi, M. Riesenhuber, T. Poggio.

    Robust object recognition with cortex-like mechanisms., in: IEEE transactions on pattern analysis and machine intelligence, March 2007, vol. 29, no 3, p. 411–26. [ DOI : 10.1109/TPAMI.2007.56 ]
  • 19G. Snider.

    Molecular-junction-nanowire-crossbar ... - Google Patent Search, 2008.
  • 20R. S. Williams.

    How We Found the Missing Memristor, in: IEEE Spectrum, 2008.