TADAAM - 2018 - Annual activity report

TADAAM

TADAAM - 2018

Project-Team Tadaam

Team, Visitors, External Collaborators

Overall Objectives

Research Program

Need for System-Scale Optimization
Scientific Challenges and Research Issues

Application Domains

Mesh-based applications

Highlights of the Year

New Software and Platforms

Hsplit
hwloc
NetLoc
NewMadeleine
PaMPA
TreeMatch
SCOTCH
disk-revolve

New Results

Checkpointing Strategies for Adjoint Computation on Hierarchical Platforms
Modeling Non-Uniform Memory Access on Large Compute Nodes with the Cache-Aware Roofline Model
Cross Platform Classification for Detecting Locality Sensitivity and Selecting Data and Threads Placement Strategy
Co-scheduling HPC workloads on cache-partitioned CMP platforms
Memory Footprint of Locality Information on Many-Core Platforms
New abstraction to manage hardware topologies in MPI applications
Scheduling Parallel Tasks under Multiple Resources: List Scheduling vs. Pack Scheduling
Sizing Burst-Buffers efficiently
Scheduling for Neurosciences
Process Affinity, Metrics and Impact on Performance
Scheduling bi-colored-chains
Experimenting task-based runtimes on a legacy Computational Fluid Dynamics code with unstructured meshes
Progress threads placement for overlapping MPI non-blocking collectives using simultaneous multi-threading
Dynamic placement of progress thread for overlapping MPI non-blocking collectives on manycore processor
Multi-criteria graph partitioning

Bilateral Contracts and Grants with Industry

Bilateral Grants with Industry

Partnerships and Cooperations

Regional Initiatives
National Initiatives
European Initiatives
International Initiatives
International Research Visitors

Dissemination

Promoting Scientific Activities
Teaching - Supervision - Juries
Popularization

Bibliography

Major publications
Publications of the year
References in notes

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Section: Highlights of the Year

Highlights of the Year

Guillaume Mercier is the chairman of the Hardware Topologies Management Working Group of the MPI Forum. This working group was created officially in December by Inria's impulse and has been rallied since by many institutions taking part in the MPI Forum. The goal of this working group is to standardize hardware topologies management mechanisms and abstractions in the MPI standard.

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