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ESPRESSO - 2011
ESPRESSO - 2011


Project Team Espresso


Members
Overall Objectives
Scientific Foundations
Software
New Results
Contracts and Grants with Industry
Partnerships and Cooperations
Dissemination
Bibliography




Bibliography

Major publications by the team in recent years
  • 1B. Bouyssounouse, J. Sifakis (editors)

    Embedded Systems Design. The ARTIST Roadmap for Research and Development, Springer, Lecture Notes in Computer Science, Vol. 3436, 2005, Thierry Gautier, contributor.
  • 2A. Gamatié (editor)

    Designing Embedded Systems with the SIGNAL Programming Language, Springer, 2009.

    http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4419-0940-4
  • 3T. P. Amagbegnon, L. Besnard, P. Le Guernic.

    Implementation of the Data-flow Synchronous Language Signal, in: Proceedings of the ACM Symposium on Programming Languages Design and Implementation (PLDI'95), ACM, 1995, p. 163–173.
  • 4A. Benveniste, B. Caillaud, P. Le Guernic.

    From synchrony to asynchrony, in: CONCUR'99, Concurrency Theory, 10th International Conference, J. C. M. Baeten, S. Mauw (editors), Lecture Notes in Computer Science, Springer, August 1999, vol. 1664, p. 162–177.
  • 5A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. Le Guernic, R. De Simone.

    The Synchronous Languages Twelve Years Later, in: Proceedings of the IEEE Special issue on Modeling and Design of Embedded Systems, 2003, vol. 91(1).
  • 6A. Benveniste, P. Le Guernic, C. Jacquemot.

    Synchronous programming with events and relations: the Signal language and its semantics, in: Science of Computer Programming, 1991, vol. 16, p. 103-149.
  • 7A. Gamatié, T. Gautier, P. Le Guernic, J.-P. Talpin.

    Polychronous Design of Embedded Real-Time Applications, in: ACM Transactions on Software Engineering and Methodology (TOSEM), 2007.
  • 8T. Gautier, P. Le Guernic.

    Code generation in the SACRES project, in: Towards System Safety, Proceedings of the Safety-critical Systems Symposium, SSS'99, Huntingdon, UK, F. Redmill, T. Anderson (editors), Springer, February 1999, p. 127–149.
  • 9P. Le Guernic, T. Gautier.

    Data-Flow to von Neumann: the Signal approach, in: Advanced Topics in Data-Flow Computing, J. L. Gaudiot, L. Bic (editors), 1991, p. 413–438.
  • 10P. Le Guernic, T. Gautier, M. Le Borgne, C. Le Maire.

    Programming Real-Time Applications with Signal, in: Proceedings of the IEEE, Septembre 1991, vol. 79, no 9, p. 1321–1336.
  • 11P. Le Guernic, J.-P. Talpin, J.-C. Le Lann.

    Polychrony for system design, in: Journal of Circuits, Systems and Computers, Special Issue on Application Specific Hardware Design, 2003.
  • 12H. Marchand, P. Bournai, M. Le Borgne, P. Le Guernic.

    Synthesis of Discrete-Event Controllers based on the Signal Environment, in: Discrete Event Dynamic System: Theory and Applications, October 2000, vol. 10, no 4, p. 347–368.
  • 13J.-P. Talpin, J. Ouy, T. Gautier, L. Besnard, P. Le Guernic.

    Compositional design of isochronous systems, in: Science of Computer Programming, 2010.
Publications of the year

Articles in International Peer-Reviewed Journal

  • 14Y. Ma, T. Gautier, J.-P. Talpin, P. Le Guernic, H. Yu.

    Modélisation compositionnelle d'architectures GALS dans un modèle de calcul polychrone, in: Journal Européen des Systèmes Automatisés, November 2011.

    http://hal.inria.fr/hal-00639589/en/
  • 15D. Potop-Butucaru, Y. Sorel, R. De Simone, L. Besnard, J.-P. Talpin.

    From concurrent multi-clock programs to concurrent multi-threaded implementations, in: Fundamenta Informaticae, 2011.

International Conferences with Proceedings

  • 16A. Bouakaz, I. Puaut, E. Rohou.

    Predictable Binary Code Cache: A First Step Towards Reconciling Predictability and Just-In-Time Compilation, in: The 17th IEEE Real-Time and Embedded Technology and Applications Symposium, Chicago, United States, Marco Caccamo, April 2011.

    http://hal.inria.fr/inria-00589690/en
  • 17J. Brandt, M. Gemunde, K. Schneider, S. Shukla, J.-P. Talpin.

    Integrating System Descriptions by Clocked Guarded Actions, in: Forum on Design Languages, September 2011.
  • 18Y. Ma, H. Yu, T. Gautier, J.-P. Talpin, L. Besnard, P. Le Guernic.

    System Synthesis from AADL using Polychrony, in: Electronic System Level Synthesis Conference, June 2011.

    http://hal.inria.fr/inria-00594943/PDF/eslsyn11-ma.pdf
  • 19V. Papailiopoulou, D. Potop-Butucaru, Y. Sorel, R. De Simone, L. Besnard, J.-P. Talpin.

    From concurrent multi-clock programs to concurrent multi-threaded implementations, in: Electronic System Level Synthesis Conference, San Diego, California, United States, June 2011.

    http://hal.inria.fr/inria-00578585/en
  • 20Z. Yang, J.-P. Bodeveix, L. Pi, D. Ma, J.-P. Talpin.

    Two formal semantics for a subset of the AADL, in: UML&AADL workshop at the IEEE International Conference on Engineering of Complex Computer Systems, 2011.
  • 21H. Yu, Y. Ma, Y. Glouche, J.-P. Talpin, L. Besnard, T. Gautier, P. Le Guernic, A. Toom, O. Laurent.

    System-level Co-simulation of Integrated Avionics Using Polychrony, in: ACM Symposium On Applied Computing, TaiChung, Taiwan, Province Of China, March 2011.

    http://hal.inria.fr/inria-00536907/en
  • 22H. Yu, J.-P. Talpin, L. Besnard, T. Gautier, H. Marchand, P. Le Guernic.

    Polychronous Controller Synthesis from MARTE CCSL Timing Specifications, in: ACM/IEEE Ninth International Conference on Formal Methods and Models for Codesign (MEMOCODE), Cambridge, United Kingdom, July 2011.

    http://hal.inria.fr/inria-00594942/en

Internal Reports

  • 23V. Papailiopoulou, D. Potop-Butucaru, Y. Sorel, R. De Simone, L. Besnard, J.-P. Talpin.

    From concurrent multi-clock programs to concurrent multi-threaded implementations, INRIA, March 2011, no RR-7577.

    http://hal.inria.fr/inria-00578585/en
References in notes
  • 24IEEE Standard for Verilog Hardware Description Language (VHDL), 2006, IEEE Std. 1364 - 2005.
  • 25ModelBus.

    http://www.modelbus.org
  • 26OpenEmbeDD website, 2009.

    http://openembedd.org
  • 27Polychrony Update Site for Eclipse plug-ins, 2009.

    http://www.irisa.fr/espresso/Polychrony/update/
  • 28TopCased website, 2009.

    http://www.topcased.org
  • 29 Airlines Electronic Engineering Committee.

    ARINC Report 651-1: Design Guidance for Integrated Modular Avionics, Aeronautical radio, Inc., Annapolis, Maryland, 1997.
  • 30 Airlines Electronic Engineering Committee.

    ARINC Specification 653: Avionics Application Software Standard Interface, Aeronautical radio, Inc., Annapolis, Maryland, 1997.
  • 31R. Alur, T. Dang, J. Esposito, Y. Hur, F. Ivancic, V. Kumar, I. Lee, P. Mishra, G. Pappas, O. Sokolsky.

    Hierarchical modeling and analysis of embedded systems, in: Proc. IEEE, 2003, vol. 91, no 1, p. 11–28.
  • 32C. André, F. Mallet, R. De Simone.

    Modeling Time(s), in: ACM/IEEE Int. Conf. on Model Driven Engineering Languages and Systems (MoDELS/UML'07), TN, USA, LNCS 4735, Springer, October 2007, p. 559–573.
  • 33A. Benveniste, P. Caspi, L. Carloni, A. Sangiovanni-Vincentelli.

    Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment, in: Embedded Software Conference (EMSOFT'03), Springer Verlag, 2003.
  • 34L. Besnard, T. Gautier, M. Moy, J.-P. Talpin, K. Johnson, F. Maraninchi.

    Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form, in: In Proceedings of the 9th Workshop on Automated Verification of Critical Systems, 2009.
  • 35L. Besnard, T. Gautier, P. Le Guernic.

    SIGNAL V4-INRIA version: Reference Manual, 2009.

    http://www.irisa.fr/espresso/Polychrony
  • 36J. Buck, S. Ha, E. A. Lee, D. G. Messerschmitt.

    Ptolemy: A Framework for Simulating and Prototyping Heterogenous Systems, in: Int. Journal in Computer Simulation, 1994, vol. 4, no 2, p. 155-182.
  • 37M. Clavreul, O. Barais, J.-M. Jézéquel.

    Integrating legacy systems with MDE, in: Proceedings of the 32nd ACM/IEEE International Conference on Software Engineering - Volume 2, New York, NY, USA, ICSE '10, ACM, 2010, p. 69–78.

    http://doi.acm.org/10.1145/1810295.1810306
  • 38J.-L. Colaco, B. Pagano, M. Pouzet.

    A conservative extension of synchronous data-flow with state machines, in: In Embedded Software Conference., ACM Press, 2005.
  • 39P. Cousot, R. Cousot.

    Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints, in: In POPL'77, 1977, p. 238-252.
  • 40J. Eker, J. Janneck, E. Lee, J. Liu, J. Ludwig, S. Neuendorffer, S. Sachs, Y. Xiong.

    Taming Heterogeneity: the Ptolemy Approach, in: Proc. IEEE, 2003, vol. 91, no 1, p. 127–144.
  • 41 Esterel Technologies.

    SCADE Suite.

    http://www.esterel-technologies.com/products/scade-suite/
  • 42T. Gautier, P. Le Guernic, J.-P. Talpin.

    Polychronous Design of Real-Time Applications with SIGNAL, in: ARTIST Survey of Programming Languages, A. Burns (editor), 2008.

    http://www.artist-embedded.org/artist/ARTIST-Survey-of-Programming.html
  • 43 INRIA AOSTE TEAM.

    Syndex.

    http://www-rocq.inria.fr/syndex/
  • 44 INRIA AOSTE TEAM.

    TimeSquare.

    http://www-sop.inria.fr/aoste/dev/time_square
  • 45O. Maler, A. Pnueli, J. Sifakis.

    On the Synthesis of Discrete Controllers for timed Systems, in: Proceedings STACS'95, Lecture Notes in Computer Science, 1995, vol. 900, p. 229–242.
  • 46H. Marchand, P. Bournai, M. Le Borgne, P. Le Guernic.

    Synthesis of Discrete-Event Controllers based on the Signal Environment, in: Discrete Event Dynamic System: Theory and Applications, October 2000, vol. 10, no 4, p. 325–346.
  • 47D. Mathaikutty, H. Patel, S. Shukla, A. Jantsch.

    SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system, in: Design Automation for Embedded Systems, 2008, vol. 12, p. 1–30.
  • 48 OBJECT MANAGEMENT GROUP (OMG).

    Modeling and Analysis of Real-time and Embedded systems (MARTE), v1.0, November 2009, Document number: formal/2009-11-02.

    http://www.omg.org/spec/MARTE/1.0/PDF/
  • 49A. Pnueli, M. Siegel, E. Singerman.

    Translation validation, in: In Proceedings of TACAS'98, 1998, p. 151-166.
  • 50P. J. Ramadge, W. M. Wonham.

    The Control of Discrete Event Systems, in: Proceedings of the IEEE, Special issue on Dynamics of Discrete Event Systems, 1989, vol. 77, no 1, p. 81–98.
  • 51É. Rutten, F. Martinez.

    Signal GTI: implementing task preemption and time intervals in the synchronous data flow language Signal, in: Proceedings of the 7th Euromicro Workshop on Real-Time Systems, Odense, Denmark, IEEE Publ., june 1995.
  • 52 SOCIETY OF AUTOMOTIVE ENGINEERS (SAE).

    Architecture Analysis Design Language (AADL, SAE standard ASS5506).

    http://www.sae.org
  • 53J.-P. Talpin, C. Brunette, T. Gautier, A. Gamatié.

    Polychronous mode automata, in: Embedded Software Conference, ACM Press, September 2006.
  • 54 The MathWorks.

    Simulink.

    http://www.mathworks.com/products/simulink/
  • 55A. Toom, T. Naks, M. Pantel, M. Gandriau, I. Wati.

    Gene-Auto: An Automatic Code Generator for a Safe Subset of SimuLink/StateFlow and Scicos, in: European Conference on Embedded Real-Time Software (ERTS'08), 2008.