Bibliography

Publications of the year

Doctoral Dissertations and Habilitation Theses

1A. Arusoaie.

A Generic Framework for Symbolic Execution:Theory and Applications, Alexandru Ioan Cuza, University of Iasi, September 2014.

https://hal.inria.fr/tel-01094765
2R. Ben Atitallah.

Dynamic reconfiguration and low power design : towards self-adaptive massively parallel embedded systems, Université de Valenciennes et Hainaut-Cambrésis, December 2014, Habilitation à diriger des recherches.

https://hal.inria.fr/tel-01104009

Articles in International Peer-Reviewed Journals

3V. Aranega, A. W. De Oliveira Rodrigues, A. Etien, F. Guyomarch, J.-L. Dekeyser.

Integrating Profiling into MDE Compilers, in: International Journal of Software Engineering & Applications (IJSEA), July 2014, vol. 5, n^o 4, 20 p. [ DOI : 10.5121/ijsea.2014.5401 ]

https://hal.inria.fr/hal-01053031
4V. Aranega, J.-M. Mottu, A. Etien, T. Degueule, B. Baudry, J.-L. Dekeyser.

Towards an Automation of the Mutation Analysis Dedicated to Model Transformation, in: Software Testing, Verification and Reliability, April 2014. [ DOI : 10.1002/stvr.1532 ]

https://hal.inria.fr/hal-00988164
5A. A. E. Cadi, R. B. Atitallah, S. Hanafi, N. Mladenovic, A. Artiba.

New MIP model for multiprocessor scheduling problem with communication delays, in: Optimization Letters, September 2014, 15 p. [ DOI : 10.1007/s11590-014-0802-2 ]

https://hal.inria.fr/hal-01104613
6D. Lucanu, V. Rusu.

Program Equivalence by Circular Reasoning, in: Formal Aspects of Computing, 2014, 15 p, forthcoming. [ DOI : 10.1007/s00165-014-0319-6 ]

https://hal.inria.fr/hal-01065830

International Conferences with Proceedings

7K. M. A. Ali, R. Ben Atitallah, S. Hanafi, J.-L. Dekeyser.

A Generic Pixel Distribution Architecture for Parallel Video Processing, in: International Conference on Reconfigurable Computing and FPGAs - ReConFig 2014, Cancun, Mexico, December 2014.

https://hal.inria.fr/hal-01070541
8A. Arusoaie, D. Lucanu, V. Rusu, T.-F. Serbanuta, A. Stefanescu, G. Rosu.

Language Definitions as Rewrite Theories, in: International Workshop on Rewriting Logic and Application, Grenoble, France, April 2014, To appear in Springer LNCS.

https://hal.inria.fr/hal-00950775
9M. Bouain, V. Viswanathan, R. Ben Atitallah, J.-L. Dekeyser.

Communication-centric design for FMC based I/O system, in: ReCoSoC - 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, Montpellier, France, May 2014.

https://hal.inria.fr/hal-01104610
10S. Ciobâcǎ, D. Lucanu, V. Rusu, G. Rosu.

A Language-Independent Proof System for Mutual Program Equivalence, in: ICFEM'14 - 16th International Conference on Formal Engineering Methods, Luxembourg-Ville, Luxembourg, Springer, November 2014, forthcoming.

https://hal.inria.fr/hal-01030754
11D. Lucanu, S. Ciobaca, V. Rusu, G. Rosu.

A theoretical foundation for language aggregation, in: 22nd International Workshop on Algebraic Development Techniques, Sinaia, Romania, September 2014.

https://hal.inria.fr/hal-01076641
12C. Trabelsi, R. B. Atitallah, S. Meftali, J.-L. Dekeyser.

Model-Driven design flow for distributed control in reconfigurable FPGA systems, in: Conference on Design and Architectures for Signal and Image Processing (DASIP 2014), Madrid, Spain, October 2014.

https://hal.inria.fr/hal-01104617
13V. Viswanathan, R. Ben Atitallah, J.-L. Dekeyser, B. Nakache, M. Nakache.

Redefining the role of FPGAs in the next generation avionic systems, in: FPGA - ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, United States, February 2014. [ DOI : 10.1145/2554688.2554744 ]

https://hal.inria.fr/hal-01104615

Conferences without Proceedings

14S. Ciobâcǎ, D. Lucanu, V. Rusu, G. Rosu.

Programming Language Aggregation with Applications in Equivalence Checking, in: PAS - Third International Seminar on Program Verification, Automated Debugging and Symbolic Computation, Vienne, Austria, July 2014.

https://hal.inria.fr/hal-00998930

Internal Reports

15A. Arusoaie, D. Lucanu, V. Rusu.

A Generic Framework for Symbolic Execution, Inria, March 2014, n^o RR-8189, 27 p.

https://hal.inria.fr/hal-00766220
16A. Arusoaie, D. Lucanu, V. Rusu.

Language-Independent Program Verification Using Symbolic Execution, Inria, October 2014, n^o RR-8369, 28 p.

https://hal.inria.fr/hal-00864341

Other Publications

17H. Krichene, M. Baklouti, M. Abid, P. Marquet, J.-L. Dekeyser.

Communication-Computation overlap in massively parallel System on Chip, May 2014, Tunisian Workshop on Embedded Systems Design (TWESD’2014).

https://hal.archives-ouvertes.fr/hal-01104157

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